Tesis doctoral de Ramón Canal Corretger
1. Com a mínim 1 i com a mí xim 4. Els codis els podeu trobar en la pí gina web: http://www.Upc.Edu/tercercicle/models/codisunesco.Php 2. El resum ha de tenir un mí xim de 4000 carí cters. Cal tenir present que si es supera aquest límit es tallarí automí ticament el resum al carí cter 4000. energy consumption and power dissipation have become a key constraint in the design of processors. In the embedded segment, battery life is an issue, so the processor energy consumption has to be minimal. In the high-performance segment, the power dissipation is a limiting factor since the cooling mechanisms are becoming more expensive or even reaching its limits. although significant research is targeted to produce longer-life batteries and better cooling systems, contributions from other areas are becoming critical. This thesis is proposes several techniques that focus either on a special part of the processor or on it as a whole. The main contributions of this thesis are explained below: contributions to the issue logic design novel issue logic designs have been proposed in this thesis. These proposals can be divided into two families: · dependence-tracking schemes. These schemes keep track of the producer-consumer relationships between instructions. Since the direct dependences are stored, the scheme eliminates most of the need for the associative wake-up logic. · prescheduling schemes. Since most of the functional units have a fixed execution latency (all but the memory); at dispatch time, the mechanism schedules the instructions for execution according to the estimated availability cycle of its source operands and functional unit. As a consequence, these schemes eliminate most of the logic needed by the issue logic since the instructions will be only considered for issue just once (at the time they have been scheduled). contributions to the ultra-low power processors value compression is shown to be an effective way to r
Datos académicos de la tesis doctoral «Power- and performance – aware architectures«
- Título de la tesis: Power- and performance – aware architectures
- Autor: Ramón Canal Corretger
- Universidad: Politécnica de catalunya
- Fecha de lectura de la tesis: 14/06/2004
Dirección y tribunal
- Director de la tesis
- Antonio Gonzalez Colas
- Tribunal
- Presidente del tribunal: Miguel Valero garcia
- Francisco Tirado fernández (vocal)
- Emilio Luque fadon (vocal)
- wen-mei Hwu (vocal)